The NT24010 consists of a novel, high-sensitivity, high-speed AGC (automatic gain control) trans-impedance amplifier followed by a Limiting Amplifier.
Up to 2.3 pF can be tolerated for the PIN capacitance allowing for ultra low-cost solutions using Si PINs.
The bondout is optimised for use with in an FOT 'sidelooker' type package.
All passive components are integrated on-chip and the NT24010 is manufactured in a standard deep-sub-micron 'Logic' CMOS process, giving an ultra low-cost, high performance, and rugged solution.
High PIN capacitance tolerance (<2.3 pF)
Fabricated in standard high-volume 'Logic' CMOS process
Compatible with the latest Gigabit Ethernet requirements
Less than 8 kHz Low cut-off frequency
Less than 45 mA total current consumption.
Differential CML compatible output stage
3.3 V supply voltage
High temperature operation (<125°C junction temperature)
No external components required within FOT
Chip Padout
Bare die – 1.08 mm x 1.21 mm (including 60 µm scribe)
Pad pitch 150 µm, pads 96 µm (86 µm passivation opening)
